1. Field of the Invention
The present invention generally relates to a method for forming a semiconductor device. More particularly, the present invention relates to an improved method for forming a fin type gate including a recess region, which solves problems associated with prior art methods, such as, a complicated process, low production margin, and difficulty in forming an accurate fin shape. In a process for forming an isolation dielectric film defining an active region, a nitride film pattern is formed in such a manner that the size of the nitride film is adjusted according to a line width of a fin portion in a fin type active region formed in a subsequent process step, and an isolation dielectric film is formed in every region except for the nitride film pattern of a semiconductor substrate. Then, a recess is etched, and the isolation dielectric film is removed from a region where the line width of the nitride film pattern was reduced to a certain degree. Consequently, a process margin for forming a fin type active region is increased, and the shape of a fin-shaped portion can be adjusted accurately, which together contribute to the improvement of electrical properties of semiconductor devices.
2. Related Technology
With high integration trends for semiconductor devices, a process margin defining an active region and an isolation dielectric film is decreasing. A short channel effect also can occur due to a decrease in the channel length resulted from a narrowed line width of a gate. To overcome this, a multi-channel FET (McFET) such as a recess gate and a fin-type gate was introduced. Here, a recess gate structure is formed by etching a semiconductor substrate in an intended gate region to a designated depth, so as to increase the channel length. Meanwhile, a fin-type gate structure is formed by increasing a contact area between an active region and a gate, so as to increase drive capability of the gate and further, to improve electrical properties of a semiconductor device.
FIG. 1 is a plan view showing a conventional method for forming a semiconductor device.
In particular, an SRAM cell region shown in the drawing defines a bar-shaped active region over a semiconductor substrate 10.
Next, an isolation dielectric film 50 is formed in a region between active regions 20.
A gate 90 is then formed in such a manner that a designated region thereof overlaps with the active region 20. At this time, the gate 90 preferably includes a recess region and a fin-type active region.
FIGS. 2a through 2g are cross-sectional views showing a conventional method for forming a semiconductor device stepwise. In each drawing, (i) illustrates a cross-section taken along line XX′ of FIG. 1, and (ii) illustrates a cross-section taken along line YY′ of FIG. 1.
Referring to FIG. 2a, a first dielectric film pattern 25 and a first nitride film pattern 30 defining an active region are formed on a semiconductor substrate 10. The semiconductor substrate 10 is etched using the first nitride film pattern 30 as a mask, and the etched region is filled up with a dielectric film layer to form an isolation dielectric film 50. At this time, a first photoresist pattern is used to form the first dielectric film pattern 25 and the first nitride film pattern 30. However, a problem in forming the isolation dielectric film 50 is that after the first dielectric pattern 25 and the first nitride film pattern 30 are formed, the first photoresist pattern has to be removed and CMP process has to be performed all over again.
Referring to FIG. 2b, a second photoresist pattern (not shown) defining a recess region is formed over the first nitride film pattern 30, and the first nitride film pattern 30 is etched using the second photoresist pattern as a mask. The second photoresist pattern is removed again to provide a first nitride film pattern 35 defining a recess region.
Referring to FIG. 2c, a second dielectric film 40 is formed in a region between the isolation dielectric film 50 and the first nitride film pattern 35 defining a recess region, and CMP process is performed until the first nitride film pattern 35 defining a recess region is exposed.
Referring to FIG. 2d, the first nitride film pattern 35 defining a recess region is removed to form a second nitride film 45 on a sidewall of the second dielectric film 40.
Next, with the second dielectric film 40 and the second nitride film 45 as a mask, the semiconductor substrate 10 is etched to form a recess region 60. At this time, the recess region 60 and the isolation dielectric film 50 in a neighboring region are removed to form a fin type gate. Here, an active region 20 that is not etched by the second nitride film 45 becomes a fin, so the line width of the second nitride film 45 becomes the line width in a fin type active region. However, it is not easy to adjust the thickness of the second nitride film 45 formed like a spacer on the second dielectric film 40, and an etch selection ratio of the nitride film against the semiconductor substrate is not high. These cause the process margin for forming an accurate fin type active region to decrease.
Referring to FIG. 2e, the first dielectric film pattern 25, the second dielectric film 40, and the second nitride film 45 on the semiconductor substrate 10 are all removed, and the portion of the isolation dielectric film 50 that is adjacent to the recess region 60 and that overlaps with an intended gate region, is etched to form the fin type active region. At this time, the etching process needs to be carefully controlled in such a way that a portion of the fin type active region for forming a fin is as high as the recess region 60. In doing so, an unnecessary channel region in the longitudinal direction of the gate is also etched, making it difficult to adjust the shape of a fin.
Referring to FIG. 2f, after a gate dielectric film 70 is formed on the surface of the active region 20, a gate polysilicon layer 75, a gate conductive layer 80, and a gate insulating layer 85 are formed one after another on the entire surface of the semiconductor substrate 10.
Referring to FIG. 2g, the gate insulating layer 85, the gate conductive layer 80, and the gate polysilicon layer 75 are etched one after another by a mask defining a gate, to form a gate 90 defining the recess region 60 and the fin type active region.
As has been explained, the conventional method for forming a semiconductor device has a complicated process and a low production margin because it uses the first and second dielectric films as well as the first and second nitride films to form a recess region, and it is therefore necessary to repeatedly perform the photoresist mask pattern formation process and the CMP process for each. In addition, according to the conventional method, when the fin type active region is formed, the line width of a fin is determined by the second nitride film of FIG. 2d. However, it is not easy to adjust the thickness of the second nitride film that is formed like a spacer, and the etch selection ratio of the nitride film to the semiconductor substrate is not high, making it hard to provide an accurate fin shape.